MerryMage
2b078152e7
reg_alloc: Reimplement UseHostLocReg
2017-02-26 21:37:26 +00:00
MerryMage
aefe550428
reg_alloc: Remove the Def concept from register allocator internals
2017-02-26 21:37:25 +00:00
MerryMage
65cccf070e
reg_alloc: Properly encapsulate HostLocInfo
2017-02-26 21:37:24 +00:00
MerryMage
469bb6253f
backend_x64: Factor EmitExclusiveWriteMemory64 into ExclusiveWrite
2017-02-26 15:34:26 +00:00
MerryMage
d7ab1f9c64
backend_x64: Fix ABI violation in ReadMemory and WriteMemory
...
Caller-save registers were not saved before call instruction.
Refer to issue #98 .
2017-02-26 15:34:25 +00:00
MerryMage
3768174783
ir_opt: Constant propagation pass works better with a DCE just before it
2017-02-26 15:28:35 +00:00
MerryMage
157585887e
ir_opt: Simplify dead-code elimination pass
2017-02-26 15:28:34 +00:00
MerryMage
bbeea72eba
ir_opt: Remove redundant shift instructions
2017-02-26 15:28:14 +00:00
MerryMage
517fe0f18e
emit_x64: WriteMemory* microinstructions do not define a value
2017-02-25 11:54:47 +00:00
MerryMage
1ff60bc69f
reg_alloc: Move OpArg into own header
2017-02-21 23:38:36 +00:00
MerryMage
4ed8ee7489
microinstruction: Void arguments when invalidating instruction
2017-02-18 21:29:23 +00:00
MerryMage
7fa5845c1f
extension: Implement SXTAB16 and SXTB16
2017-02-18 20:14:44 +00:00
MerryMage
73d1cf36c3
extension: Simplify UXTB16
2017-02-18 20:14:39 +00:00
MerryMage
6edcfeba0b
extension: Simplify rotation code
2017-02-18 20:14:37 +00:00
MerryMage
cc9d2c4603
saturated: Implement SSAT16 and USAT16
2017-02-18 17:43:57 +00:00
MerryMage
358cf7c322
vfp: Implement vectorized VFP instructions
2017-02-18 01:13:25 +00:00
MerryMage
f2dd82967f
load_store: Simplify implementation
...
* Remove dead code
* Standardise code style with rest of code base
2017-02-16 22:28:56 +00:00
MerryMage
058f7b5de6
emit_x64: Make EmitTerminal type-safe
...
Avoid the use of boost::variant::which, which tends to produce code which
is not verifiable at compile-time.
2017-02-16 19:40:51 +00:00
MerryMage
e197b10b96
common: Introduce utility function VisitVariant
...
VisitVariant allows one to use a generic lambda to visit a boost::variant.
This is necessary because boost::visit_variant requires the visitor type
to provide a return type.
2017-02-16 19:30:56 +00:00
MerryMage
5a20a37d3f
arm/fpscr: Correct Stride implementation
2017-02-11 12:13:57 +00:00
MerryMage
033e8b9b1e
vfp: Rename variables a, b, c to more sensible names
2017-02-06 21:14:36 +00:00
MerryMage
2af39dfaa8
emit_x64: Make reg_alloc a local variable
...
reg_alloc contains state that is only valid on a per-block basis, so there
is no reason for it to be a member variable.
2017-02-04 09:29:35 +00:00
MerryMage
a0e9417912
ir_opt: Initial constant propagation pass implementation
2017-01-30 21:49:46 +00:00
MerryMage
2447f2f360
callbacks: Factorize memory callbacks into inner structure
2017-01-30 21:42:51 +00:00
MerryMage
642ccb0f66
ir/value: Support U16 immediates
2017-01-29 22:58:11 +00:00
MerryMage
5f7ffe0d0b
microinstruction: Implement Inst::AreAllArgsImmediates
2017-01-29 22:56:59 +00:00
MerryMage
22804dc6a5
microinstruction: Arguments of Inst::Use and Inst::UndoUse should be const
2017-01-29 22:53:46 +00:00
MerryMage
1d4446cad5
microinstruction: Removed unnecessary reference from argument of Inst::ReplaceUsesWith
2017-01-29 22:52:33 +00:00
MerryMage
3e0e339d98
bit_util: Remove unnecessary include
2017-01-09 22:19:51 +00:00
MerryMage
9ecdd32b84
coprocessor: Implement fast-path for Coproc{Send,Get}{OneWord,TwoWords}
...
Allow coprocessor interface to provide pointers instead of a callback.
This allows for a fastpath when all that is required is to read or write a
value and no other action needs to be taken.
2017-01-08 14:56:06 +00:00
MerryMage
e3bc7d039f
Implement CDP, LDC, MCR, MCRR, MRC, MRRC, STC
2017-01-08 14:56:06 +00:00
MerryMage
48693eb6ff
Implement coprocessor-related microinstructions
...
* CoprocInternalOperation
* CoprocSendOneWord
* CoprocSendTwoWords
* CoprocGetOneWord
* CoprocGetTwoWords
* CoprocLoadWords
* CoprocStoreWords
2017-01-08 14:56:06 +00:00
MerryMage
b3ae57619d
types: Formatting for CoprogReg
2017-01-08 14:56:06 +00:00
MerryMage
d8a37e287c
IR: Add IR type CoprocInfo
2017-01-08 14:56:06 +00:00
MerryMage
890b2f75ad
callbacks: Add coprocessor interface
2017-01-08 14:56:06 +00:00
MerryMage
1efd3a764d
IR: Remove unused microinstructions NegateLowWord and NegateHighWord
2017-01-05 20:16:39 +00:00
Fernando Sahmkow
70f4235ee9
Implement UXTAB16 ( #78 )
2016-12-29 12:15:18 +00:00
MerryMage
0d1fa85402
bit_util: Bit<T>(size_t, const T) cannot be constexpr
...
Compound statements are not permitted in constexpr functions in C++14
2016-12-29 10:08:35 +00:00
FernandoS27
d5610eb26c
Implement UHASX, UHSAX, SHASX and SHSAX ( #75 )
2016-12-28 21:32:22 +00:00
MerryMage
e9df248d56
decoder_detail: Support const member functions
2016-12-23 11:33:40 +00:00
MerryMage
163b67bf1f
mp: Add support for const member function pointers to FunctionInfo
2016-12-23 11:32:12 +00:00
MerryMage
b1bad4b5cc
decoder_detail: static_assert member function is from visitor class
...
Improves readability of compiler errors.
2016-12-23 11:10:02 +00:00
MerryMage
c7e5216473
emit_x64: EraseInstruction now also invalidates the instruction
...
There is now no longer a need to call DecrementRemainingUses on the parent
instruction.
2016-12-22 18:43:11 +00:00
MerryMage
c78f153ddb
decoder/arm: Sort decoders according to number of bits in mask
2016-12-22 15:25:38 +00:00
MerryMage
cb38c94b58
decoder/arm: Fix decoding of RFE
2016-12-22 15:25:07 +00:00
MerryMage
7e77ee7fd6
decoder/arm: Fix decoding of MCR2
2016-12-22 15:11:47 +00:00
Fernando Sahmkow
677f62dd6f
Implement SHSUB8 and SHSUB16 ( #74 )
...
* Implement IR operations PackedHalvingSubS8 and PackedHalvingSubS16
2016-12-22 12:02:24 +00:00
MerryMage
967f3cf7e1
Implement CPS (Thumb)
...
* Since currently only User mode is emulated, CPS is a NOP.
2016-12-21 22:44:27 +00:00
MerryMage
c764a2b889
Implement MUL (T1)
2016-12-21 22:44:14 +00:00
MerryMage
36082087de
callbacks: Read code using MemoryReadCode callback
2016-12-21 21:39:14 +00:00
MerryMage
56ea2386d3
saturated: Implement SSAT and USAT
2016-12-21 19:51:25 +00:00
MerryMage
6a269a6ebd
IR: Add microinstructions UnsignedSaturation and SignedSaturation
2016-12-21 19:51:25 +00:00
MerryMage
b23b524b03
bit_util: Add SignExtend implementation with runtime bit_count argument
2016-12-21 19:51:25 +00:00
MerryMage
02b2ab7581
emit_x64: Pass tmp to ExtractMostSignificantBitFromPackedBytes in EmitPackedAddU8
2016-12-20 22:07:51 +00:00
MerryMage
097f6a83da
emit_x64: Document ExtractAndDuplicateMostSignificantBitFromPackedWords
2016-12-20 22:06:14 +00:00
MerryMage
03f168094d
emit_x64: Document ExtractMostSignificantBitFromPackedBytes
2016-12-20 22:05:51 +00:00
FernandoS27
8919265d2c
Implement SADD8, SADD16, SSUB8, SSUB16, USUB16
2016-12-20 21:52:38 +00:00
FernandoS27
3f6ecfe245
Implemented USAD8 and USADA8
2016-12-20 21:52:38 +00:00
MerryMage
b1d3e7aae9
emit_x64: Refactor patching code
...
* Only have a single std::unordered_map for patching information
* Factor patch emitters into own functions
* Implement EmitX64::Unpatch
2016-12-20 14:06:55 +00:00
MerryMage
cc58666c06
CMakeLists: Use target_compile_options intead of add_compile_options
2016-12-19 00:48:25 +00:00
MerryMage
74a95ea51e
block_of_code: Rename alloc to AllocateFromCodeSpace
2016-12-18 23:43:48 +00:00
MerryMage
96e46ba6b5
Implement QADD, QSUB, QDADD, QDSUB
2016-12-15 22:34:29 +00:00
MerryMage
b178ab3bec
Replace (void)(...); idiom with UNUSED macro
2016-12-15 21:36:05 +00:00
MerryMage
276873bf70
Wrap #pragma warning with #ifdef _MSC_VER .. #endif
2016-12-15 21:36:02 +00:00
MerryMage
0e8b626d87
CMakeLists: Globally disable MSVC warning C4592
...
C4592: Symbol will be dynamically initialized (implementation limitation)
2016-12-15 21:09:55 +00:00
MerryMage
91e851a991
CMakeLists: Enable /W4 on MSVC
2016-12-15 20:52:23 +00:00
MerryMage
63caed7b09
emit_x64: Remove argument names of unused arguments
2016-12-15 20:52:22 +00:00
MerryMage
df197ff6b1
arm/types: Use smallest possible standard type that has sufficient bits for Imm{} types
2016-12-15 20:52:21 +00:00
MerryMage
546198d603
translate_arm: Mark arguments as unused
2016-12-15 20:52:20 +00:00
MerryMage
8d5522f4a0
dissassembler_arm: Support BKPT, QASX, QSAX, UQASX, UQSAX
2016-12-15 20:16:08 +00:00
Yuri Kunde Schlesner
34e19f135c
CMake: Re-use external xbyak target if present ( #62 )
2016-12-12 14:23:42 +00:00
MerryMage
5bea2e1680
block_of_code: Support stack unwinding on Windows
2016-12-12 07:49:18 +00:00
MerryMage
4962d92b79
block_of_code: Do not regenerate prelude when clearing cache
2016-12-12 07:49:18 +00:00
MerryMage
2a1cf94b1c
CMakeLists: Include backend_x64 only if we're targeting x86_64
2016-12-12 07:49:18 +00:00
MerryMage
dcc880a002
assert: _a_ expression string shouldn't be part of the format string
...
The expression may contain the % operator.
2016-12-12 07:49:18 +00:00
MerryMage
179a3388f9
block_of_code: Provide an alloc function to allocate space in the code block
2016-12-12 07:49:18 +00:00
Lioncash
f467589346
emit_x64: Remove unnecessary casts
2016-12-05 20:30:19 +00:00
Lioncash
a37631c010
emit_x64: Use reinterpret_cast for pointer casts
2016-12-05 20:30:19 +00:00
Lioncash
fafa845f64
emit_x64: Make GetBasicBlock() const qualified
2016-12-05 12:46:22 +00:00
Lioncash
6a16edc0fb
emit_x64: Move implementations into the cpp file
...
Prevents needing to rebuild everything including the emitter if any
details ever change.
2016-12-05 12:46:22 +00:00
Lioncash
282029f60a
emit_x64: Forward declare BlockOfCode
2016-12-05 12:46:22 +00:00
Lioncash
6898b74c78
emit_x64: Get rid of indirect includes
2016-12-05 12:46:22 +00:00
MerryMage
54d051977f
emit_x64: Use movdqa instead of movaps in EmitPackedSubU8
...
While movaps and movdqa are behaviourly equivalent, using movaps may incur
a domain crossing penalty on some microarchitectures. This is because
movaps is an instruction in the floating-point domain while the following
instructions are in the integer domain.
2016-12-05 01:00:51 +00:00
MerryMage
52e1445f43
Implement USUB8
2016-12-05 00:29:15 +00:00
MerryMage
5c1aab1666
Implement CLZ
...
Includes tests
2016-12-04 22:56:33 +00:00
MerryMage
1a1646d962
Implement UADD8
2016-12-04 20:52:33 +00:00
MerryMage
7cad6949e7
IR: Implement new pseudo-operation GetGEFromOp
2016-12-04 20:52:06 +00:00
MerryMage
25f21b5371
emit_x64: Inline nzcv computation into EmitFPCompare32 and EmitFPCompare64
2016-12-04 11:43:31 +00:00
MerryMage
cede5e442a
emit_x64: Use xorps/xorpd when argument to TransferToFP32/TransferToFP64 is an immediate zero
2016-12-03 11:41:10 +00:00
MerryMage
e166965f3e
Implement VCMP
2016-12-03 11:41:09 +00:00
MerryMage
f2fe376fc6
Support 64-bit immediates
2016-12-03 11:29:50 +00:00
Mat M
95f34c683c
reg_alloc: Remove unnecessary breaks after returns ( #54 )
2016-12-02 19:14:44 +00:00
Mat M
de1f831d79
microinstruction: Make use_count private ( #53 )
...
Makes the operation a part of the direct interface.
2016-11-30 21:51:06 +00:00
MerryMage
3621a925b2
reg_alloc: Register allocator related constraints belong with the rest of the register allocator
...
HostLocToReg64 contained two DEBUG_ASSERTs invloving constraints that
really belonged to the register allocator.
The register allocator prevents allocation of RSP and R15 because those
are reserved for the stack pointer and the state pointer respectively.
2016-11-30 19:42:41 +00:00
MerryMage
5f11b4f50e
HostLoc: R15 is a GPR
2016-11-30 18:38:03 +00:00
Sebastian Valle
14eb70d7e4
VFP: Fixed the VCVT behavior when converting from unsigned 32-bit values. ( #51 )
...
Use a 64-bit register to hold the values so that we don't end up interpreting them as signed values.
2016-11-27 23:25:50 +00:00
Merry
0ff8c375af
Implement UHSUB8 and UHSUB16 ( #48 )
2016-11-26 18:27:21 +00:00
Merry
cb17f9a3ed
Implement SHADD8 and SHADD16 ( #47 )
2016-11-26 18:12:29 +00:00
Sebastian Valle
11ae8d1ffa
Added disassembler support for the ARM parallel add/subtract (modulo arithmetic) instructions. ( #50 )
2016-11-26 17:58:09 +00:00
Sebastian Valle
ed71e31cea
Added disassembler support for the ARM parallel and saturated instructions ( #44 )
2016-11-26 17:49:46 +00:00
MerryMage
c0c1bb1094
Implemented UHADD16
2016-11-26 11:28:20 +00:00
Mat M
4f7dc81492
mp: Fix static_assert condition ( #46 )
...
Not an issue currently, but this would have prevented type inspection on
the last function parameter.
2016-11-25 22:09:45 +00:00
Yuri Kunde Schlesner
9ec51f74bd
libfmt: Update version to current master
2016-11-25 20:47:04 +00:00
Sebastian Valle
4d44474ad4
Implemented the ARM UHADD8 instruction. ( #45 )
...
The x64 implementation uses the SSSE3 instruction PSHUFB.
A non-SSE fallback is provided in case the CPU doesn't support it.
2016-11-25 20:32:22 +00:00
Sebastian Valle
f32921d493
ARM: Implemented UXTB16. ( #42 )
...
It passes tests.
2016-11-24 08:21:12 +00:00
Sebastian Valle
32615d0eff
Implemented the PKHTB and PKHBT instructions with tests. ( #40 )
2016-11-23 21:45:18 +00:00
MerryMage
780ff8e00e
status_register_access: SEL: Use GetGEFlags
2016-11-23 19:47:35 +00:00
MerryMage
b6f7b8babd
ir: Implement GetGEFlags, SetGEFlags
2016-11-23 19:44:27 +00:00
MerryMage
e7d02a5439
get_set_elimination_pass: Refactor CPSR related eliminations
2016-11-23 18:42:13 +00:00
Sebastian Valle
d589c63107
Implemented the ARM SEL instruction, with tests. ( #39 )
...
The test for this instruction is very peculiar. As the instruction's behavior depends on the value of the CPSR, we generate a MSR instruction after each SEL instruction to change the CPSR.
2016-11-23 18:14:07 +00:00
Mat M
65dcf45ca6
FPSCR: Mask away reserved bits ( #34 )
2016-09-21 17:51:13 +01:00
MerryMage
792f2bfd94
translate_arm: Remove unused method ArmTranslatorVisitor::LinkToNextInstruction
2016-09-21 14:07:53 +01:00
Mat M
f75acd6cfb
decoder: Generify the matcher interface ( #33 )
...
Gets rid of a bit of duplication while remaining compatible
with the current interfaces in place.
2016-09-17 09:48:18 +01:00
Mat M
943487ecee
disassembler: Provide includes to function declarations ( #32 )
2016-09-14 23:03:09 +01:00
Mat M
72897b5def
types: Provide ostream operator<< overloads where applicable ( #30 )
2016-09-07 14:21:17 +01:00
Mat M
b41de890fb
memory_pool: Deduplicate slab allocation code ( #28 )
2016-09-07 13:20:42 +01:00
Merry
d646c3119d
Merge pull request #29 from lioncash/list
...
intrusive_list: Minor changes
2016-09-07 12:10:05 +01:00
Mat M
6a2174ebfa
Add missing explicit specifiers ( #27 )
2016-09-07 12:08:48 +01:00
Mat M
6e0f27a500
types: Add helpers for determining single and doubleword extension registers ( #26 )
2016-09-07 12:08:35 +01:00
Lioncash
c052f9f84c
intrusive_list: Amend doxygen parameter documentation
2016-09-06 22:54:33 -04:00
Lioncash
1c4868ccce
intrusive_list: Correct unused variable
2016-09-06 22:54:25 -04:00
Lioncash
8fb857f9da
intrusive_list: Specify noexcept on swap implementations
...
Necessary to fully satisfy the Swappable concept.
2016-09-06 22:47:55 -04:00
Mat M
5bc9ce544f
arm_types: Move into arm folder ( #25 )
2016-09-06 00:52:33 +01:00
Mat M
b40d19c3b7
location_descriptor: Provide operator<< string overload ( #24 )
2016-09-05 21:31:25 +01:00
MerryMage
1f61a3d7bc
jitstate: Rename fields s/guest_FPSCR/FPSCR/
2016-09-05 14:42:21 +01:00
Mat M
6d53bb6d7e
arm_types: Split out LocationDescriptor ( #20 )
...
This isn't really an ARM-specific type, since it's used to indicate a
Block location.
2016-09-05 11:54:09 +01:00
Mat M
84336cf29d
value: Change Value into a class ( #19 )
...
'struct' is a little bit of a misnomer, considering it has invariants
2016-09-05 11:53:56 +01:00
Mat M
858796a029
Eliminate variable shadowing warnings with MSVC ( #17 )
2016-09-04 11:30:57 +01:00
Mat M
7f9a0c3c38
Remove unnecessary explicit includes ( #16 )
2016-09-03 21:48:03 +01:00
Mat M
26db11cd71
reg_alloc: Use a strongly-typed enum for representing OpArg type ( #15 )
2016-09-03 18:30:03 +01:00
Mat M
05b189bc26
arm_types: Specialize std::hash for LocationDescriptor ( #14 )
...
Same thing, but with the benefit of working with anything that uses
std::hash by default.
2016-09-03 12:48:47 +01:00
Mat M
8c4df46580
FPSCR: Make value constructor explicit ( #13 )
...
Maintains consistency between the PSR helper.
2016-09-03 12:48:31 +01:00
Mat M
3e03524658
assert: Use attribute specifier syntax with non MSVC compilers ( #12 )
2016-09-03 12:48:07 +01:00
MerryMage
cc3e7e71aa
bit_util: std::bitset-based BitCount implementation
...
Suggestion by @lioncash.
2016-09-02 22:00:48 +01:00
Mat M
5aa4f753b6
load_store: Add checks for unpredictability to other singular store instructions ( #11 )
2016-09-02 21:10:28 +01:00
MerryMage
e8764c129f
bit_util: Implement BitCount portably
2016-09-02 19:05:49 +01:00
Mat M
6ec651498d
arm: Add PSR helper type ( #3 )
2016-09-02 17:34:33 +01:00
Mat M
00d0f4d5ff
load_store: Add correctness checks for STRD variants ( #7 )
...
STRD doesn't allow the use of the PC in either Rt or Rt2
2016-09-02 17:32:02 +01:00
Mat M
d16badbc04
get_set_elimination_pass: Replace decltype with direct type retrieval ( #9 )
2016-09-02 17:30:21 +01:00
Mat M
1e781d911a
reg_alloc: const correctness ( #8 )
2016-09-02 17:30:01 +01:00
MerryMage
ba04be5071
travis: Build on OS X
2016-09-02 17:08:09 +01:00
MerryMage
b3743e9453
Revert "arm_types: Don't use std::hash<u64>() for LocationDescriptorHash"
...
This reverts commit 519c714dbc
.
2016-09-02 14:33:56 +01:00
MerryMage
519c714dbc
arm_types: Don't use std::hash<u64>() for LocationDescriptorHash
...
Apple Clang (clang-600.0.54 on x86_64-apple-darwin13.4.0) complains with:
implicit instantiation of undefined template 'std::__1::hash<unsigned long long>'
2016-09-02 12:45:09 +01:00
Mat M
a465b2ddbc
ir_emitter: Fix typo. ClearExlcusive -> ClearExclusive ( #5 )
2016-09-02 12:17:22 +01:00
Mat M
ea157dfd52
translate_arm: const-correctness ( #6 )
2016-09-02 12:17:02 +01:00
MerryMage
711b3e29d3
interface: Allow ClearCache to be called at any time
2016-09-02 10:59:33 +01:00
Mat M
fb6d838bd9
dynarmic: Remove poison_memory ClearCache parameter ( #1 )
...
Unused since the switch to Xbyak
2016-09-01 09:47:09 +01:00
Mat M
7e3c981974
translate: Forward declare LocationDescriptor ( #2 )
2016-09-01 09:46:35 +01:00
MerryMage
4321e829d1
callbacks: Add user_arg argument to InterpreterFallback
2016-09-01 02:00:08 +01:00
MerryMage
3b5c43b427
Optimization: Read page-table directly for memory access
2016-09-01 00:58:02 +01:00