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217 commits

Author SHA1 Message Date
MerryMage
2f06ef5d4e a32_emit_x64: EmitA32SetCpsr: BUGFIX: Actually set CPSR.GE 
Was unintentionally masking the writing of CPSR.GE due to 32-bit immediate sign extension.
 2020-04-22 21:04:23 +01:00
MerryMage
0a6f822d76 a32_emit_x64: GenTerminalHandlers: Remove unnecessary mov 2020-04-22 21:04:23 +01:00
MerryMage
396116ee61 A32: Add hook_hint_instructions option 2020-04-22 21:04:23 +01:00
MerryMage
2f2a859615 a32_jitstate: Consolidate upper bits of location descriptor into upper_location_descriptor 
Also solves a performance regression initially introduced by b6e8297e369f2dc4758bafe944e51efb8d1a2552,
primarily due to excessively mismatched load/store sizes causing less than optimal load-to-store forwarding.
 2020-04-22 21:04:23 +01:00
Merry
1c97edac77 Merge pull request #503 from lioncash/cmp 
A64: Implement half-precision variants of FCMEQ
 2020-04-22 21:04:22 +01:00
Merry
f252a62c1b Merge pull request #502 from lioncash/header 
General: Remove unnecessary includes
 2020-04-22 21:04:22 +01:00
Lioncash
22bd95902d backend/x64/reg_alloc: Apply const where applicable 
Also tidies up bracing where applicable along the way.
 2020-04-22 21:04:22 +01:00
Lioncash
349d4b577a General: Remove unnecessary includes 
Removes unnecessary header dependencies that have accumulated over time
as changes have been made. Lessens the amount of files that need to be
rebuilt when the headers change.
 2020-04-22 21:04:22 +01:00
Lioncash
43fd2b400a frontend/ir_emitter: Add half-precision opcode for FPVectorEquals 2020-04-22 21:04:22 +01:00
Lioncash
cba9351b82 backend/x64/emit_*: Apply const where applicable 2020-04-22 21:04:22 +01:00
Lioncash
23f56bdb67 x64/exception_handler_windows: Join namespace declaration 
Uses a nested namespace declaration like the rest of the codebase.
 2020-04-22 21:04:22 +01:00
Lioncash
3bbb06c34a a64_emit_x64: Apply [[maybe_unused]] to unused lambda parameter 
This can result in an unused variable warning on Windows otherwise.
 2020-04-22 21:04:22 +01:00
Lioncash
bfa8035414 A32/A64: Make public header inclusions consistent 
For all public header inclusions, we use the <> form of including them
as opposed to "", which we typically use for internal headers.
 2020-04-22 21:04:22 +01:00
Lioncash
ccf923305c a32_interface: Remove duplicated documentation comments 
These already exist in the header, so these ones can be removed.
 2020-04-22 21:04:22 +01:00
Lioncash
182ceb2807 General: Make parameter names from declarations and implementations consistent 
Most of the time when this occurs, it's a bug. Thankfully this isn't the
case. However, we can resolve these cases to make the codebase more
consistent.
 2020-04-22 21:04:22 +01:00
Lioncash
6b9bf7868a General: Correct typos is code comments 2020-04-22 21:04:22 +01:00
Lioncash
6187de7ca7 a32_interface: std::move UserConfig where applicable 
UserConfig instances contain up to 16 std::shared_ptr<Coprocessor>
instances. We can std::move here to avoid performing 16 redundant atomic
reference increment and decrement operations.

Mostly inconsequential on x64, but we may as well signify intent.
 2020-04-22 21:04:22 +01:00
Lioncash
b13b6610b5 a32_interface: Default destructor in the cpp file 
Makes it more consistent with code throughout the codebase.
 2020-04-22 21:04:22 +01:00
MerryMage
5f8eb7c51c A32/location_descriptor: Add CPSR.IT to A32::LocationDescriptor 2020-04-22 21:04:22 +01:00
MerryMage
6e2cd35e4f a32_jitstate: Optimize runtime location descriptor calculation 
Calculation is now one unaligned 64-bit load.
 2020-04-22 21:04:22 +01:00
MerryMage
0de3993373 a32_jitstate: Remove fpsr_idc 
We do not really have accurate FPSR state in any case.
 2020-04-22 21:04:22 +01:00
MerryMage
6f49c0ef8e {a32,a64}_jitstate: Rename CPSR_* to cpsr_* 2020-04-22 21:04:22 +01:00
MerryMage
8cd7837839 a32_jitstate: Remove old_FPSCR 2020-04-22 21:04:22 +01:00
MerryMage
b3bb544bca a32_jitstate: Rename FPSCR_nzcv to fpsr_nzcv 2020-04-22 21:04:22 +01:00
MerryMage
76f986979d a32_jitstate: Rename FPSCR_mode to fpcr_mode 2020-04-22 21:04:22 +01:00
MerryMage
49fca15f90 {a32,a64}_jitstate: Rename FPSCR_IDC to fpsr_idc 2020-04-22 21:04:21 +01:00
MerryMage
622c02f537 {a32,a64}_jitstate: Remove FPSCR_UFC 2020-04-22 21:04:21 +01:00
MerryMage
366d63f4b4 a32_jitstate: Enable SSE FTZ and DAZ 2020-04-22 21:04:21 +01:00
MerryMage
f178562ee7 a32_jitstate: Remove exception trap enables from FPSCR_MODE_MASK 
We don't currently use this for anything (we do not currently trap
floating point exceptions).

This frees these bits up for other purposes.
 2020-04-22 21:04:21 +01:00
Merry
fd6222f0a1 Merge pull request #500 from lioncash/cbz 
A32: Implement Thumb-1's CBZ/CBNZ instructions
 2020-04-22 21:04:21 +01:00
Merry
bab4e29075 Merge pull request #498 from lioncash/ahp 
A32/location_descriptor: Add AHP bit to the FPSCR mask
 2020-04-22 21:04:21 +01:00
Lioncash
87083af733 general: Remove trailing spaces 
General code-related cleanup. Gets rid of trailing spaces in the
codebase.
 2020-04-22 21:04:21 +01:00
Lioncash
fdbafbc1ae x64/reg_alloc: Remove reference qualifier to variable in GetArgumentInfo() 
The result of GetArg() is returned by value, so this is essentially
still a copy. While the previous code *is* valid, this communicates what
is actually happening a little more explicitly.
 2020-04-22 21:04:20 +01:00
Lioncash
d02a4e6fc9 A32/location_descriptor: Add AHP bit to the FPSCR mask 
Ensures the alternate half-precision state is preserved within the
location descriptors, which will be necessary when implementing the
half-precision extensions for VFP and NEON.
 2020-04-22 21:02:47 +01:00
Lioncash
bd755ae494 frontend/ir/ir_emitter: Add A32 equivalent to A64's SetCheckBit 
This will be used in a subsequent change to implement ARMv6T2's CBZ/CBNZ
Thumb-1 instructions.
 2020-04-22 21:02:47 +01:00
Lioncash
c6e1fd1416 a64_emit_x64: Use const on locals where applicable 
Normalizes the use of const in the source file.
 2020-04-22 21:02:47 +01:00
Merry
f6f0b6da65 Merge pull request #497 from lioncash/boost 
A32/coprocessor: Remove boost from public interface
 2020-04-22 21:02:47 +01:00
Lioncash
fb437080be a32_emit_x64: Use const on locals where applicable 
Normalizes the use of const in the source file.
 2020-04-22 21:02:47 +01:00
Lioncash
5f9ba970b9 emit_x64: Use const on locals where applicable 2020-04-22 21:02:47 +01:00
Lioncash
92daae9513 A32/coprocessor: Remove boost from public interface 
Removes a boost header from the public includes in favor of using the
standard-provided std::variant.

The use of boost in public interfaces is often a dealbreaker for some
people. Given we use std::optional in the header already, we can
transition over to std::variant from boost::variant.

With this removal, this makes all of our dependencies internal to the
library itself.
 2020-04-22 21:02:47 +01:00
Lioncash
a40b921cb5 emit_x64: Remove unnecessary typename in GetBasicBlock() 
This can be deduced from the name alone.
 2020-04-22 21:02:47 +01:00
Lioncash
675f67e41d emit_x64_vector: Use const on locals where applicable 
Normalizes the use of const in the source file.
 2020-04-22 21:02:47 +01:00
Lioncash
cccbc7fd0e emit_x64_saturation: Use const on locals where applicable 
Normalizes the use of const in the source file.
 2020-04-22 21:02:47 +01:00
Lioncash
7316fa47b3 emit_x64_packed: Use const on locals where applicable 
Normalizes the use of const across the source file.
 2020-04-22 21:02:47 +01:00
Lioncash
3a9c2f81d0 block_of_code: Use variable template variants of type traits 
Now all type traits are using the variable template variants where
applicable.
 2020-04-22 21:02:47 +01:00
Lioncash
9b783a5527 emit_x64_data_processing: Use const on locals where applicable 
Normalizes the use of const across the source file.
 2020-04-22 21:02:47 +01:00
MerryMage
5debb411cc block_of_code: Explicitly delete copy constructor 2020-04-22 21:02:46 +01:00
MerryMage
605a43d23e Suppress MSVC warning C4702: unreachable code 2020-04-22 21:02:46 +01:00
Lioncash
8316d231e9 A32: Implement barrier instructions introduced in ARMv7 
Provides basic implementations of the barrier instruction introduced
within ARMv7. Currently these simply mirror the behavior of the AArch64
equivalents.
 2020-04-22 21:02:46 +01:00
Merry
09ee64ea98 Merge pull request #482 from lioncash/fixedfp 
A64: Handle half-precision variants of FP->Fixed instructions
 2020-04-22 21:02:45 +01:00
MerryMage
1e1e9c17c7 emit_x64_data_processing: Remove INVALID_REG 
INVALID_REG.cvt8() now throws
 2020-04-22 21:02:45 +01:00
Lioncash
604f39f00a frontend/ir_emitter: Add half-precision->fixed-point opcodes 2020-04-22 21:01:45 +01:00
Lioncash
96356fac93 frontend/ir_emitter: Add half-precision opcode variant of FPVectorRSqrtStepFused 2020-04-22 21:01:45 +01:00
Merry
45864133f5 Merge pull request #478 from lioncash/stepfused 
A64: Handle half-precision variants of FRECPE and FRECPS
 2020-04-22 21:01:44 +01:00
Lioncash
824c551ba2 frontend/ir_emitter: Add half-precision opcode variant of FPRSqrtStepFused 2020-04-22 21:01:44 +01:00
Lioncash
037acb17b9 frontend/ir_emitter: Add half-precision opcode variant for FPVectorRSqrtEstimate 2020-04-22 21:01:44 +01:00
Lioncash
5dba99b4f4 frontend/ir_emitter: Add half-precision opcode variant for FPRSqrtEstimate 2020-04-22 21:01:44 +01:00
Lioncash
825a3ea16f frontend/ir_emitter: Add half-precision opcode for FPVectorRecipEstimate 2020-04-22 21:01:44 +01:00
Lioncash
2184d24e8f frontend/ir_emitter: Add half-precision opcode for FPRecipEstimate 2020-04-22 21:01:44 +01:00
Lioncash
5d5c9f149f frontend/ir_emitter: Add half-precision opcode for FPVectorRecipStepFused 2020-04-22 21:01:44 +01:00
Lioncash
6da0411111 frontend/ir_emitter: Add half-precision opcode for FPRecipStepFused 2020-04-22 21:01:44 +01:00
Lioncash
5b4673da4b frontend/ir_emitter: Add half-precision variant of FPVectorRoundInt 2020-04-22 21:01:44 +01:00
Lioncash
ad0c698f89 frontend/ir_emitter: Add half-precision variant of FPRoundInt 2020-04-22 21:01:44 +01:00
Merry
cb9a1b18b6 Merge pull request #475 from lioncash/muladd 
A64: Enable half-precision variants of floating-point multiply-add instructions
 2020-04-22 21:01:44 +01:00
Merry
13f421c27d Merge pull request #473 from lioncash/sqshlu 
A64: Implement SQSHLU
 2020-04-22 21:01:44 +01:00
Merry
d7da53a74b Merge pull request #472 from lioncash/exception 
general: Mark hash functions as noexcept
 2020-04-22 21:01:44 +01:00
Lioncash
a4cadf1cd9 frontend/ir_emitter: Add opcodes for signed saturated left shifts with unsigned saturation 2020-04-22 21:01:44 +01:00
Lioncash
ec6b3ae084 ir/frontend: Add half-precision opcode for FPVectorMulAdd 2020-04-22 21:01:44 +01:00
Lioncash
bd82513199 frontend/ir_emitter: Add half-precision opcode for FPMulAdd 2020-04-22 21:01:44 +01:00
Lioncash
7bb5440507 general: Mark hash functions as noexcept 
Generally hash functions shouldn't throw exceptions. It's also a
requirement for the standard library-provided hash functions to not
throw exceptions.

An exception to this rule is made for user-defined specializations,
however we can just be consistent with the standard library on this to
allow it to play nicer with it.

While we're at it, we can also make the std::less specializations
noexcpet as well, since they also can't throw.
 2020-04-22 21:01:43 +01:00
Lioncash
fe95575b95 general: Replace unreachable-imitating assertions with UNREACHABLE() 
We can just use the self-documenting assertion for indicating
unreachable paths, instead of manually passing false and providing a
message.
 2020-04-22 21:01:43 +01:00
Lioncash
b37279f65c backend/x64/emit_x64_vector: Prevent undefined behavior within VectorSignedSaturatedShiftLeft 
Avoids undefined behavior by potentially left-shifting a signed negative
value.
 2020-04-22 21:00:47 +01:00
MerryMage
13e8b7b516 emit_x64_floating_point: F16C implementation of FPSingleToHalf 2020-04-22 20:58:17 +01:00
MerryMage
d32d6fe598 emit_x64_floating_point: F16C implementation of FPHalfToSingle and FPHalfToDouble 2020-04-22 20:58:12 +01:00
MerryMage
a53ba12be2 emit_x64_floating_point: Factor out ConvertRoundingModeToX64Immediate 2020-04-22 20:58:12 +01:00
MerryMage
5a2adc6629 backend/x64: Expose FPCR in EmitContext instead of its subcomponents 2020-04-22 20:58:12 +01:00
Merry
01bb1cdd88 Merge pull request #458 from lioncash/float-op 
A64: Handle half-precision floating point in FABS, FNEG, and scalar FMOV
 2020-04-22 20:58:12 +01:00
Lioncash
8309ec7a9f frontend/ir_emitter: Add half-precision variant of FPAbs 2020-04-22 20:58:12 +01:00
Lioncash
e4c259d69f frontend/ir_emitter: Add half->{single, double} and {double, single}->half conversion opcodes 2020-04-22 20:58:12 +01:00
Lioncash
c97efcb978 frontend/ir_emitter: Add half-precision variant of FPNeg 2020-04-22 20:58:12 +01:00
Lioncash
bd892ec4ef frontend/ir/ir_emitter: Amend FPRecipExponent to handle half-precision floating point 2020-04-22 20:58:11 +01:00
Merry
bbd5330ad2 Merge pull request #447 from lioncash/flag 
A64: Implement CFINV, RMIF, AXFlag and XAFlag
 2020-04-22 20:58:11 +01:00
Merry
fb039e232c Merge pull request #442 from lioncash/fcvtxn 
A64: Implement scalar and vector variants of FCVTXN
 2020-04-22 20:58:11 +01:00
Lioncash
597a8be5d5 ir: Add A64-specific opcodes for getting and setting raw NZCV values 
This will be necessary to implement the flag manipulation and flag
format instructions.
 2020-04-22 20:58:11 +01:00
Lioncash
5cf1478620 frontend/ir: Add opcodes for vector square roots 2020-04-22 20:58:10 +01:00
Lioncash
7c81a58ed3 frontend/ir/ir_emitter: Alter parameters of FPDoubleToSingle() and FPSingleToDouble() to pass along desired rounding mode 
This will be necessary to special-case the non-IEEE Von Neumann rounding
to odd rounding mode.
 2020-04-22 20:58:10 +01:00
Merry
9f11720a69 Merge pull request #437 from lioncash/frecpx 
A64: Implement FRECPX (single, double precision)
 2020-04-22 20:58:10 +01:00
Lioncash
9cf3c25811 frontend/ir/ir_emitter: Add opcodes for floating point reciprocal exponents 2020-04-22 20:58:10 +01:00
Lioncash
2e180a7f14 backend/x64/a32_interface: Mark Context move constructor and move assignment as noexcept 
Provides a more "correct" move constructor/assignment operator, since
these relevant functions shouldn't throw exceptions.

Has the benefit of playing nicely with std::move_if_noexcept and other
noexcept library facilities.
 2020-04-22 20:58:09 +01:00
Lioncash
deb9dd4acc block_of_code: Replace cast with [[maybe_unused]] in DoesCpuSupport() 2020-04-22 20:58:09 +01:00
Lioncash
3290a9fdc2 common: Remove address_range.h 
The AddressRange structure isn't used anywhere within the codebase, so
this can be removed. Particularly because there's no real appeal/heavy
potential use of it in the future that isn't trivial to add back if
needed.
 2020-04-22 20:57:38 +01:00
Lioncash
93351c7efb a64_emit_x64: Make constness of loop elements explicit within GenFastmemFallbacks() 2020-04-22 20:57:37 +01:00
Lioncash
7752ffc50c a64_emit_x64: Convert std::vector instances in GenFastmemFallbacks() to std::array 
Given these are quite small, we can avoid the need to heap allocate
here.
 2020-04-22 20:57:37 +01:00
MerryMage
7c8fcaef26 emit_x64_vector_floating_point: AVX && DN implementation of EmitFPVectorMulX 2020-04-22 20:57:37 +01:00
MerryMage
fa8925c4df IR: Implement FPVectorMulX 2020-04-22 20:57:37 +01:00
V.Kalyuzhny
764a93bf5a Switch boost::optional to std::optional 2020-04-22 20:57:37 +01:00
Lioncash
d69fceec55 value: Move ImmediateToU64() to be a part of Value's interface 
This'll make it slightly nicer to do basic constant folding for 32-bit
and 64-bit variants of the same IR opcode type. By that, I mean it's
possible to inspect immediate values without a bunch of conditional
checks beforehand to verify that it's possible to call GetU32() or
GetU64, etc.
 2020-04-22 20:55:50 +01:00
MerryMage
ca603c1215 reg_alloc: Emit AVX instructions where able 
Smaller codesize.
 2020-04-22 20:55:50 +01:00
MerryMage
e2358af5ef abi: Emit AVX instructions where able 
Smaller codesize.
 2020-04-22 20:55:50 +01:00
MerryMage
7c0378f56d a64_exclusive_monitor: Loosen memory ordering requirements 
It is not necessary to be as strict as it was.
 2020-04-22 20:55:50 +01:00