merry
|
1a5f4930b7
|
Merge pull request #585 from lioncash/word
thumb32: Implement Thumb-2 LDR variants
|
2021-03-09 19:16:13 +00:00 |
|
Lioncash
|
3d7e81e7d1
|
thumb32: Implement LDR variants
|
2021-03-09 13:12:15 -05:00 |
|
MerryMage
|
646fd05920
|
thumb32: Implement RSB (reg)
|
2021-03-06 19:49:44 +00:00 |
|
MerryMage
|
3f97cb1f9b
|
thumb32: Implement SUB (reg)
|
2021-03-06 19:49:44 +00:00 |
|
MerryMage
|
17bdb54d30
|
thumb32: Implement CMP (reg)
|
2021-03-06 19:49:44 +00:00 |
|
MerryMage
|
a63271fd3b
|
thumb32: Implement SBC (reg)
|
2021-03-06 19:49:44 +00:00 |
|
MerryMage
|
95189b78ef
|
thumb32: Implement ADC (reg)
|
2021-03-06 19:49:44 +00:00 |
|
MerryMage
|
af33155ef8
|
thumb32: Implement ADD (reg)
|
2021-03-06 19:49:44 +00:00 |
|
MerryMage
|
41ac9971f4
|
thumb32: Implement CMN (reg)
|
2021-03-06 19:49:44 +00:00 |
|
MerryMage
|
e7ecd3a7ee
|
thumb32: Implement PKHBT, PKHTB
|
2021-03-06 19:49:44 +00:00 |
|
MerryMage
|
d2d996e6ba
|
thumb32: Implement EOR (reg)
|
2021-03-06 19:49:44 +00:00 |
|
MerryMage
|
158a13173c
|
thumb32: Implement AND (reg)
|
2021-03-06 19:49:44 +00:00 |
|
MerryMage
|
c253b8fc51
|
thumb32: Implement TST (reg)
|
2021-03-06 19:49:44 +00:00 |
|
merry
|
ea5d8a3047
|
Merge pull request #584 from lioncash/loads
thumb32: Implement Thumb-2 Load Byte and Memory Hints instructions
|
2021-03-06 17:31:45 +00:00 |
|
MerryMage
|
531bb42ab5
|
thumb32: Implement B (T3)
|
2021-03-06 17:29:55 +00:00 |
|
MerryMage
|
86aa3f0701
|
thumb32: Implement B (T4)
|
2021-03-06 17:27:54 +00:00 |
|
Lioncash
|
52fdf801d0
|
thumb32: Implement LDRSB variants
|
2021-03-06 11:33:33 -05:00 |
|
Lioncash
|
fe892732cf
|
thumb32: Implement LDRB variants
|
2021-03-06 11:06:30 -05:00 |
|
Lioncash
|
c66afadbc1
|
thumb32: Implement PLI variants
|
2021-03-06 09:55:29 -05:00 |
|
Lioncash
|
b2802aaf17
|
thumb32: Implement PLD variants
|
2021-03-06 09:36:51 -05:00 |
|
Lioncash
|
ee99fa69e9
|
thumb32: Add load source files
Places all the skeleton files in place.
|
2021-03-06 09:13:05 -05:00 |
|
Lioncash
|
47ab3a1450
|
CMakeLists: Add decoder .inc files
This makes them show up in IDE generators like XCode.
|
2021-03-05 21:00:31 -05:00 |
|
merry
|
f09e400858
|
Merge pull request #582 from lioncash/pbi
thumb32: Implement most plain binary immediate instructions
|
2021-03-05 23:20:58 +00:00 |
|
MerryMage
|
67e954a4cf
|
thumb32_data_processing_plain_binary_immediate: Make invalid {S,U}SSAT16 decode undefined
|
2021-03-02 20:54:19 +00:00 |
|
MerryMage
|
52a9af3dca
|
CMakeLists: Rework architecture detection
* Also only enable xybak/vixl on appropriate architectures
|
2021-03-02 20:41:38 +00:00 |
|
merry
|
3d418e9a4f
|
Merge pull request #583 from lioncash/str
thumb32: Implement STRB/STRH/STR (register)
|
2021-03-02 02:19:47 +00:00 |
|
Lioncash
|
2ac615b882
|
thumb32: Implement SSAT/USAT
|
2021-03-01 15:59:52 -05:00 |
|
Lioncash
|
5601aa554e
|
thumb32: Implement STRB/STRH/STR (register)
|
2021-03-01 15:41:49 -05:00 |
|
MerryMage
|
2fbb79fdf2
|
externals: Build vixl
|
2021-03-01 20:36:21 +00:00 |
|
MerryMage
|
1ca401619d
|
Merge commit 'e64a00a7fcc1cfa7ac5f81626f85075997f9d8a3' as 'externals/vixl/vixl'
|
2021-03-01 20:20:36 +00:00 |
|
MerryMage
|
170ab30b8e
|
thumb32: Implement RSB (immediate)
|
2021-02-28 21:49:14 +00:00 |
|
MerryMage
|
8d33de2dcc
|
thumb32: Implement SUB (immediate, T3)
|
2021-02-28 21:49:14 +00:00 |
|
MerryMage
|
8efb2a5b05
|
thumb32: Implement CMP (immediate)
|
2021-02-28 21:49:14 +00:00 |
|
MerryMage
|
78330e634f
|
thumb32: Implement SBC (immediate)
|
2021-02-28 21:49:14 +00:00 |
|
MerryMage
|
e6b925146b
|
thumb32: Implement ADC (immediate)
|
2021-02-28 21:49:14 +00:00 |
|
MerryMage
|
8f9e052c93
|
thumb32: Implement ADD (imm, T3)
|
2021-02-28 21:49:14 +00:00 |
|
MerryMage
|
30442ee1f4
|
thumb32: Implement CMN (immediate)
|
2021-02-28 21:49:14 +00:00 |
|
merry
|
421548ceef
|
Merge pull request #581 from lioncash/8dot6
a64: Add v8.6 instruction encoding additions
|
2021-02-27 21:54:08 +00:00 |
|
Lioncash
|
385f907463
|
a64: Add v8.6 instruction encoding additions
Keeps the instruction listing up to date.
|
2021-02-27 16:25:13 -05:00 |
|
merry
|
bf7d1a17ba
|
Merge pull request #580 from lioncash/shift
thumb32: Implement ASR, LSL, LSR, and ROR register variants
|
2021-02-26 19:07:12 +00:00 |
|
Lioncash
|
9d5505422f
|
thumb32: Implement ADD/SUB (imm 2)
|
2021-02-25 09:56:05 -05:00 |
|
Lioncash
|
68885fdb3c
|
thumb32: Implement SBFX/UBFX
|
2021-02-25 09:37:15 -05:00 |
|
Lioncash
|
7334914047
|
thumb32: Implement BFC/BFI
|
2021-02-25 09:27:05 -05:00 |
|
Lioncash
|
ba7cbe7cf6
|
thumb32: Implement SSAT16/USAT16
|
2021-02-25 09:13:46 -05:00 |
|
Lioncash
|
725d712c88
|
thumb32: Simplify register shift implementations to common function
|
2021-02-23 04:53:50 -05:00 |
|
Lioncash
|
a7a9ed69b7
|
thumb32: Implement ROR (register)
|
2021-02-23 04:52:29 -05:00 |
|
Lioncash
|
abf3548b2a
|
thumb32: Implement ASR (register)
|
2021-02-23 04:43:11 -05:00 |
|
Lioncash
|
e06d4bcbb2
|
thumb32: Implement LSR (register)
|
2021-02-23 04:40:43 -05:00 |
|
Lioncash
|
fdd379a36c
|
thumb32: Implement LSL (register)
|
2021-02-23 04:40:40 -05:00 |
|
merry
|
ac32175eff
|
Merge pull request #579 from lioncash/bxj
thumb32: Implement BXJ
|
2021-02-22 15:01:08 +00:00 |
|