Lioncash
e0d6b60270
thumb32: Implement UXTAB
2021-02-10 16:23:54 -05:00
Lioncash
d97369c252
thumb32: Implement UXTB
2021-02-10 16:22:22 -05:00
Lioncash
ad5d0d7b77
thumb32: Implement SXTAB
2021-02-10 16:20:43 -05:00
Lioncash
75a28b00a7
thumb32: Implement SXTB
2021-02-10 16:18:26 -05:00
Lioncash
3cefdc3ab9
thumb32: Implement UXTAB16
2021-02-10 16:16:56 -05:00
Lioncash
eec16eea45
thumb32: Implement UXTB16
2021-02-10 16:15:28 -05:00
Lioncash
6733cdd706
thumb32: Implement SXTAB16
2021-02-10 16:13:34 -05:00
Lioncash
1b5fcfd8d1
thumb32: Implement SXTB16
2021-02-10 16:11:09 -05:00
Lioncash
39a75472e2
thumb32: Implement UXTAH
2021-02-10 16:09:37 -05:00
Lioncash
e12ee8d4d7
thumb32: Implement UXTH
2021-02-10 16:07:17 -05:00
Lioncash
c0871d4c18
thumb32: Implement SXTAH
2021-02-10 16:04:33 -05:00
Lioncash
273125e0b1
thumb32: Implement SXTH
2021-02-10 15:58:36 -05:00
merry
fe761b2c61
Merge pull request #574 from lioncash/multiply2
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thumb32: Implement long multiply and divide instructions
2021-02-09 20:37:16 +00:00
Lioncash
8cd91a84d0
thumb32: Implement SDIV/UDIV
2021-02-07 17:53:34 -05:00
Lioncash
fb1405157b
thumb32: Implement UMAAL
2021-02-07 17:45:00 -05:00
Lioncash
f9bbc25e29
thumb32: Implement SMLSLD{X}
2021-02-07 17:42:44 -05:00
Lioncash
fe3deb1831
thumb32: Implement SMLALD{X}
2021-02-07 17:40:36 -05:00
Lioncash
87cb771bd2
thumb32: Implement SMLALXY
2021-02-07 17:37:26 -05:00
Lioncash
8320c56a6e
thumb32: Implement UMLAL
2021-02-07 17:34:05 -05:00
Lioncash
5859105a61
thumb32: Implement SMLAL
2021-02-07 17:32:11 -05:00
Lioncash
28108c7924
thumb32: Implement UMULL
2021-02-07 17:29:20 -05:00
Lioncash
6cf47e0ce0
thumb32: Implement SMULL
2021-02-07 17:22:43 -05:00
merry
7290ae1273
Merge pull request #573 from lioncash/multiply2
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thumb32: Implement the rest of the thumb-2 multiply category instructions
2021-02-07 21:04:42 +00:00
MerryMage
f77b0e2fbe
A32/thumb16: Implement IT instruction
2021-02-07 20:41:48 +00:00
MerryMage
97d8b50c25
A32: Ensure existing thumb code is ITState-correct
2021-02-07 20:41:48 +00:00
MerryMage
68bd9547c5
fuzz_arm: Correctly print thumb instruction listing
2021-02-07 20:41:48 +00:00
MerryMage
62003a2d89
A32/ir_emitter: Implement UpdateUpperLocationDescriptor
2021-02-07 20:41:48 +00:00
MerryMage
f229a68aed
a32_emit_x64: Update upper_location_descriptor in BXWritePC based on final location
2021-02-07 20:41:48 +00:00
MerryMage
714b0b9a8b
A32/translate: Factor conditional state handling out
2021-02-07 20:41:48 +00:00
Lioncash
b58cd3a996
thumb32: Implement SMLAWY
2021-02-07 13:34:56 -05:00
Lioncash
96895d2eb5
thumb32: Implement SMULWY
2021-02-07 13:32:39 -05:00
Lioncash
8a22bdff43
thumb32: Implement SMLSD{X}
2021-02-07 13:29:20 -05:00
Lioncash
ef3b77f8ae
thumb32: Implement SMLAD{X}
2021-02-07 13:26:53 -05:00
Lioncash
53f1a52be9
thumb32: Implement SMMLS{R}
2021-02-07 13:23:21 -05:00
Lioncash
0c542777b0
thumb32: Implement SMMLA{R}
2021-02-07 13:14:47 -05:00
Lioncash
b6add0ddf4
thumb32: Implement SMMUL{R}
2021-02-07 13:11:25 -05:00
Lioncash
44f4f437a7
thumb32: Implement SMUSD
2021-02-07 13:07:38 -05:00
Lioncash
4d9a7308ac
thumb32: Implement SMUAD
2021-02-07 13:04:18 -05:00
Lioncash
1e06231575
thumb32: Implement SMLAXY
2021-02-07 12:39:12 -05:00
Lioncash
1cd10e3214
thumb32: Implement SMULXY
2021-02-07 12:27:40 -05:00
MerryMage
1e29ef8b0e
A32/location_descriptor: Implement SetIT
2021-02-07 14:18:03 +00:00
MerryMage
5e75bd41a4
ITState: Handle not-in-IT-block case in Cond
2021-02-07 14:17:46 +00:00
MerryMage
946dbb5818
ITSTate: Correct ITState::Advance
2021-02-07 13:21:45 +00:00
MerryMage
1c5f6882f0
A32/translate_thumb: Correct IsThumb16
2021-02-07 12:18:45 +00:00
MerryMage
7e5ae6076a
A32: Add arch_version option
2021-02-07 12:13:14 +00:00
Lioncash
50d81f95e5
thumb32: Implement USADA8
2021-02-07 09:57:34 +00:00
Lioncash
ed453aa52d
thumb32: Implement USAD8
2021-02-07 09:57:34 +00:00
Lioncash
b07fab604f
thumb32: Implement MLS
2021-02-07 09:57:34 +00:00
Lioncash
cf5058bccb
thumb32: Implement MLA
2021-02-07 09:57:34 +00:00
Lioncash
153d87c843
thumb32: Implement MUL
2021-02-07 09:57:34 +00:00
MerryMage
8b612edb75
translate_thumb: Fix bug in TranslateSingleThumbInstruction
2021-02-06 21:26:44 +00:00
MerryMage
aa89418e8b
bit_util: Add SwapHalves32
2021-02-06 21:26:44 +00:00
MerryMage
fa1b9545fd
bit_util: Rename Swap{16,32,64} to SwapBytes{16,32,64}
2021-02-06 21:26:44 +00:00
MerryMage
39644d69ee
A32/decode: Split thumb32
2021-02-06 21:26:42 +00:00
MerryMage
6d0a049fb2
A32/decode: Split thumb16
2021-02-06 21:25:24 +00:00
MerryMage
ac9e1ccb1c
A32/thumb16: Fix bug in CBZ/CBNZ
2021-02-06 21:25:24 +00:00
Lioncash
23619c8c6a
thumb32: Implement SHSUB8/UHSUB8
2021-02-01 17:50:46 -05:00
Lioncash
9d2570470e
thumb32: Implement SHADD8/UHADD8
2021-02-01 17:50:46 -05:00
Lioncash
afad76078d
thumb32: Implement SHSUB16/UHSUB16
2021-02-01 17:50:46 -05:00
Lioncash
51b7c32d02
thumb32: Implement SHSAX/UHSAX
2021-02-01 17:50:46 -05:00
Lioncash
f0a219fcd0
thumb32: Implement SHASX/UHASX
2021-02-01 17:50:46 -05:00
Lioncash
94f8efbb03
thumb32: Implement SHADD16/UHADD16
2021-02-01 17:50:46 -05:00
Lioncash
aa49b0db89
thumb32: Implement QSUB8/UQSUB8
2021-02-01 17:50:46 -05:00
Lioncash
874ab6a7b6
thumb32: Implement QADD8/UQADD8
2021-02-01 17:50:46 -05:00
Lioncash
d923fb24c6
thumb32: Implement QSUB16/UQSUB16
2021-02-01 17:50:46 -05:00
Lioncash
416fe26df0
thumb32: Implement QSAX/UQSAX
2021-02-01 17:50:14 -05:00
Lioncash
ad7c8bd042
thumb32: Implement QASX/UQASX
2021-02-01 17:31:30 -05:00
Lioncash
f52b8f924c
thumb32: Implement QADD16/UQADD16
2021-02-01 17:31:30 -05:00
Lioncash
6f593da41b
thumb32: Implement SSUB8/USUB8
2021-02-01 17:31:27 -05:00
Lioncash
271354ee95
thumb32: Implement SADD8/UADD8
2021-02-01 16:44:11 -05:00
Lioncash
8f42fd5c0e
thumb32: Implement SSUB16/USUB16
2021-02-01 16:41:02 -05:00
Lioncash
0e28c63456
thumb32: Implement SSAX/USAX
2021-02-01 16:36:18 -05:00
Lioncash
21e404d3ab
thumb32: Implement SASX/UASX
2021-02-01 16:31:25 -05:00
Lioncash
d529417875
thumb32: Implement SADD16/UADD16
2021-02-01 16:19:33 -05:00
merry
0e26e8a531
Merge pull request #569 from lioncash/t32-misc
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thumb32: Implement miscellaneous category instructions
2021-02-01 21:06:36 +00:00
Lioncash
36fc596a51
thumb32: Implement QADD
2021-02-01 15:44:09 -05:00
Lioncash
cd6e4c7afd
thumb32: Implement QSUB
2021-02-01 15:42:14 -05:00
Lioncash
65365ad2a3
thumb32: Implement QDADD
2021-02-01 15:39:39 -05:00
Lioncash
d96c8c662b
thumb32: Implement QDSUB
2021-02-01 15:35:09 -05:00
Lioncash
c60cf921ee
thumb32: Implement REV
2021-02-01 15:30:40 -05:00
Lioncash
0304dc7ce4
thumb32: Implement REV16
2021-02-01 15:27:31 -05:00
Lioncash
cee31c5274
thumb32: Implement RBIT
2021-02-01 15:20:24 -05:00
Lioncash
e2bc7eeb93
thumb32: Implement REVSH
2021-02-01 15:16:53 -05:00
MerryMage
e01583abba
A64/system: Reorder fields of SystemRegisterEncoding
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Matches manual, which allows for easier verification of correctness.
2021-02-01 20:01:39 +00:00
Lioncash
1ad99bb9b5
thumb32: Implement SEL
2021-02-01 15:01:21 -05:00
Lioncash
8d53048750
thumb32: Implement CLZ
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Also fleshes out the generator to allow for generating thumb32
instructions as well.
2021-02-01 14:54:04 -05:00
MerryMage
f2345c1590
A64/system: Implement MSR/MRS for NZCV
2021-02-01 19:52:49 +00:00
bunnei
de389968eb
A32: Add hook_isb option.
2021-01-28 20:47:39 -08:00
MerryMage
0f27368fda
A64: Add hook_isb option
2021-01-26 23:41:21 +00:00
MerryMage
3806284cbe
emit_x64{,_vector}_floating_point: Fix non-FMA execution
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Avoid repeated calls to GetArgumentInfo
2021-01-02 20:40:32 +00:00
MerryMage
6023bcd8ad
emit_x64_data_processing: Fix signed/unsigned warning
2021-01-02 20:12:48 +00:00
MerryMage
c15917b350
backend/x64: Add further Unsafe_InaccurateNaN locations
2021-01-02 20:12:48 +00:00
MerryMage
f9ccf91b94
Add Unsafe_InaccurateNaN optimization to all fma instructions
2021-01-02 17:22:50 +00:00
MerryMage
8c4463a0c1
emit_x64_data_processing: EmitSub: Use cmp where possible
2021-01-01 19:37:47 +00:00
MerryMage
e926f0b393
emit_x64_data_processing: Minor optimization for immediates in EmitSub
2021-01-01 13:35:01 +00:00
MerryMage
eeeafaf5fb
Introduce Unsafe_InaccurateNaN
2021-01-01 07:18:05 +00:00
ReinUsesLisp
4a9a0d07f7
backend/{a32,a64}_emit_x64: Add config entry to mask page table pointers
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Add config entry to mask out the lower bits in page table pointers.
This is intended to allow users of Dynarmic to pack small integers
inside pointers and update the pair atomically without locks.
These lower bits can be masked out due to the expected alignment in
pointers inside the page table.
For the given usage, using AND on the pointer acts the same way as a
TEST instruction. That said when the mask value is zero, TEST is still
emitted to keep the same behavior.
2020-12-29 19:16:46 +00:00
MerryMage
42059edca4
decoder_detail: Fix bit_position and one unused warnings in GetArgInfo
2020-12-28 23:34:23 +00:00
MerryMage
b47e5ea1e1
emit_x64_data_processing: Use BMI2 shifts where possible
2020-12-28 22:42:51 +00:00
ReinUsesLisp
ba6654b0e7
location_descriptor: Fix compare operator for single stepping
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Compare `single_stepping` with the other's value instead of comparing it
with the local value.
2020-12-01 09:11:40 +00:00
